In order to form a silicon carbide semiconductor device with good reproducibility, it is required that a SiC clean surface is formed first and then an insulating film, an electrode, or the like is formed on the clean surface. Therefore, the structure of the SiC clean surface and a method for forming the SiC clean surface must be established. However, this method has not been reported. It is known that when SiC is heated to a very high temperature of 1300.degree. C. or higher under high vacuum, Si desorbs from the surface and the surface is covered with excessive carbon. The carbon has been turned into graphite, and if junction interface formation or epitaxial growth is carried out using this surface, an impurity level is formed at the interface. Also, the temperature of 1300.degree. C. is too high and is a problem from the viewpoint of the processing. Therefore, an improvement in the method for forming a clean surface at low temperature has been required.
Also, in order to form a more efficient electronic device, it is sometimes required to form structural patterns of steps and terraces such as a trench structure on the SiC surface. However, a method for forming the trench structure or the like into the SiC surface, with good reproducibility, good control, and low defect, has not been established. A surface having structural patterns, formed by reactive ion etching with a HCl gas or an O.sub.2 +CF.sub.4 gas, ion milling with an inert gas, HF plasma etching, laser etching using excimer lasers, or mechanical cutting or grinding with a diamond saw, has defects of about 10.sup.9 cm.sup.-2 or more, causing a problem when forming electronic devices.
Conventionally, 6H-type and 4H-type SiC single crystal substrates (wafers) have been commercially available. On the other hand, 3C--SiC, which has the highest drift speed, can only be formed as a heteroepitaxially grown crystal on the Si substrate. When growing silicon carbide (3C--SiC) on the Si substrate surface, carbon and/or hydrogen gases are first supplied to the Si surface to be carbonized by heating, and then carbon and silicon are supplied to heteroepitaxially grow silicon carbide. In the silicon carbide thin film formed by this conventional technique, the formation of high density lattice defects, twins, pits, or the like occurs at the SiC/Si interface, causing a problem when the silicon carbide is applied to forming an electronic device. Furthermore, single crystal grains with two types of phases grow on the Si substrate, and an anti phase boundary (APB) is formed at the interface of the two types of the crystal grains having a different phase from each other, so that a number of defects are introduced.
Conventionally, an insulating film for electronic devices comprises a silicon (di)oxide thin film formed by subjecting SiC itself to an oxidation treatment. For example, by subjecting a 6H--SiC(0001)Si face to wet oxidation at 1100.degree. C. for 1 hour, a thin silicon (di)oxide thin film having a thickness of about 30 nm (300 angstroms) is formed. However, the oxidation speed of 30 nm (300 angstroms)/hour is much lower than 700 nm (7000 angstroms)/hour for a normal Si process and is not practical. Also, the silicon (di)oxide SiO.sub.2 is formed by oxidizing silicon carbide containing Si atoms and C atoms in a ratio of 1:1, so that the silicon (di)oxide contains surplus carbon atoms and has a low electrical insulating property. Furthermore, when measuring the refractive index and the thickness using an ellipsometer, the refractive index is about 1.2 to 1.3, smaller than 1.4 to 1.5 for intrinsic silicon (di)oxide. This shows that the silicon (di)oxide contains a portion different from the intrinsic SiO.sub.2 or that the SiO.sub.2 /SiC interface is not abrupt and contains other substances, causing a problem when it is used as the insulating film for an electronic device that requires a clean interface.
With respect to single crystal substrates such as 6H and 4H of SiC, the silicon carbide crystals are very hard. Therefore, it has been known conventionally that when a single crystal is cut and polished during the processing for wafers, a number of defects are introduced especially to the surface. In the surface treatment for these substrates, cleaning with an agent such as RCA cleaning has conventionally been carried out. However, the defects present near the silicon carbide surface cannot be removed by cleaning with an agent such as the conventional RCA cleaning. Therefore, when an electronic device is formed, the mobility, the reproducibility, the breakdown voltage and the like degrade.
The single-crystal silicon-carbide wafer size is about a diameter of 30 mm, which is too small, which is a problem from a practical viewpoint. Therefore, SiC formed on the Si substrate surface is expected as a wafer having a large area. However, the electric characteristics of the SiC/Si layered structure are not clear. Therefore, a vertical type semiconductor device in which current flows through the SiC/Si interface has not been implemented, for example; the loss caused by the forward voltage drop, or the like cannot be determined.